In some existing systems it becomes necessary to use wide registers that contain more bits of data than the system data bus may carry at one time. These types of systems will therefore require multiple data read/write operations over the system data bus in order to provide the full amount of data to/from a wide register. Requiring multiple software operations for a single wide register operation slows down the system. Existing hardware solutions to compensate for this problem include using shadow registers for each wide register. Such hardware solutions are not feasible, however, due to their cost.